[libre-riscv-dev] [Bug 319] New: POWER9 setting carry (and other) XER flags

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=319

            Bug ID: 319
           Summary: POWER9 setting carry (and other) XER flags
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

we need to think through how to set the various XER flags properly.
if we naively have XER as a permanent incoming input (and output),
this will create a permanent sequential (in-order) read-write hazard
on all ALU operations that will light up the DMs covering XER like
a mythbusters christmas tree.

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