[libre-riscv-dev] [Bug 316] bperm TODO

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=316

--- Comment #12 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
you forgot this.  do a git pull in a moment...

diff --git a/src/soc/logical/bperm.py b/src/soc/logical/bperm.py
index 1dcb36d..05321e5 100644
--- a/src/soc/logical/bperm.py
+++ b/src/soc/logical/bperm.py
@@ -37,7 +37,7 @@ class Bpermd(Elaboratable):
         index = Signal(8)
         signals = [ Signal(1) for i in range(64) ]
         for i,n in enumerate(signals):
-            n.eq(self.rb[i])
+            m.d.comb += n.eq(self.rb[i])
         rb64 = Array(signals)
         for i in range(0, 8):
             index = self.rs[8 * i:8 * i + 8]

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