[libre-riscv-dev] [Bug 305] Create Pipelined ALU similar to alu_hier.py

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=305

--- Comment #51 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #50)
> I tried using the rotator.py taken from microwatt, and it seems it doesn't
> work. After fixing some syntax errors, I set the inputs up for a left shift,
> and it did not output what I expected. I spent around 45 minutes setting up
> a testbench for microwatt's rotator.vhdl, and it behaves correctly for the
> same inputs.

i may have messed things up in the translation from VHDL to nmigen, i didn't
write a unit test for it.

> Considering that I have already written a working shifter, is it worthwhile
> trying to get this one to work?

there are some significant elegant aspects of the microwatt-based one, namely
that it covers *all* shift operations in that short and compact code.  it uses
the trick of having only 1 64-bit shifter (ROTL) instance, putting the 32-bit
data in *twice* - once into the top 32-bit and again into the bottom 32-bit -
reducing the amount of hardware needed to perform both 32 and 64 bit shifts
by at least 30%.

however if you feel that you can get something operational and compliant
quicker
than by debugging rotator.py then go for it.  we can look at clean-up and
merge,
later.

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