[libre-riscv-dev] PowerISA 3.1 (Power10) spec released

[Hendrik Boom]

On Tue, May 12, 2020 at 03:46:33PM +0100, Luke Kenneth Casson Leighton wrote:
> On Tue, May 12, 2020 at 2:55 PM Hendrik Boom <hendrik at topoi.pooq.com> wrote:
> >
> > On Tue, May 12, 2020 at 08:56:15AM +0100, Luke Kenneth Casson Leighton wrote:
> > >
> > > they're sufficiently busy that the core engineers (the ones in IBM,
> > > responsible for the POWER architecture) have not yet responded -
> > > publicly - to our ISAMUX/NS letter
> > > (https://libre-riscv.org/isa_conflict_resolution/isamux_isans/), and
> > > ISAMUX/NS is an extremely important part (absolutely mission-critical)
> > > of what we need to do.
> >
> > Just noticing that document is RISCV-oriented, and nowhere mentions POWER at
> > all.
> 
> sorry, browser-auto-complete history: this one.
> https://libre-soc.org/openpower/isans_letter/

This one reads much better.  It argues why standardising the way the PowerPC 
ISA is essential.

But it lacks technical detail about the mechanism you're proposing.  It mostly 
rules out a lot of options you're not proposing.  Perhaps that's elsewhere?

-- hendrik

> 
> l.
> 
> _______________________________________________
> libre-riscv-dev mailing list
> libre-riscv-dev at lists.libre-riscv.org
> http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev