[libre-riscv-dev] [Bug 304] Define minimum viable interface set for 180nm ASIC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=304

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
yehowshua i added a stub/starting-point ls180

https://git.libre-soc.org/?p=pinmux.git;a=blob;f=src/spec/ls180.py;h=77c5f1f7f7923cb8292499bac189ff1ce8f3b6ff;hb=aca6d68a6159136fe1f36c6430e2ffd07da13e8c

also added a stub / dummy LPC function:
https://git.libre-soc.org/?p=pinmux.git;a=blob;f=src/spec/pinfunctions.py;h=e46be8d114f00bbf571092c4e7a9ec5ece39d04b;hb=aca6d68a6159136fe1f36c6430e2ffd07da13e8c#l52

it will need its pin naming correcting, and also in ls180.py everything
including LPC moving to a single column.

we need to move quickly on this because Rudi is waiting for us
to communicate back to him the required peripheral set, and he
is experienced enough to know that we are well beyond the industry
standard time for making these decisions.

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