[libre-riscv-dev] little-endian only power cores and spec compliance

Jacob Lifshay programmerjake at gmail.com
Tue May 12 08:46:22 BST 2020

On Tue, May 12, 2020, 00:40 Jacob Lifshay <programmerjake at gmail.com> wrote:

> On Tue, May 12, 2020, 00:32 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> wrote:
>> without BE, this is flat-out impossible to do.
> Oops, forgot about that.

Never mind, now that I take more than 15s to think about it, we need BE for
the instruction stream but LE for data access (since that's effectively
industry standard), so it's still effectively a LE-only architecture since
everything but the instruction decoder is LE, but the instruction decoder
can be switched to BE mode.

Having our architecture require BE for all memory accesses just because we
want to support 16-bit instructions is a non-starter in my opinion



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