[libre-riscv-dev] daily status update 05may2020

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed May 6 14:00:41 BST 2020

On Wed, May 6, 2020 at 10:34 AM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:

>> I mentioned that our project extensively uses reset_less=True with
>> combinatorial signals on the now-closed nmigen bug about adding
>> warnings for that case:
>> https://github.com/nmigen/nmigen/issues/379
> there is a resetless domain.

... which probably wouldn't have helped.

thank you for taking care of that: it would have been a royal pain in
the neck to suddenly have thousands of unnecessary warnings.

btw as an example, the CompUnits have an explicit "reset" capability -
a line named "go_die".  when that's asserted, the SR Latches reset
back to "known-good".  to have a "hidden nice convenient reset line"
to every single synchronous signal would be a huge waste of resources.
likewise the Dependency Matrices have a similar thing.

nice reset is great for FPGAs.  it's also useful for interface code,
to get it back into a known-good state.

we *do* use reset - i think - in the pipeline register-latch API,
because that's a place where it's needed.  although, there, again, for
"mask cancellable" pipelines we do *not* need "reset"... because
pulling the mask-cancel bit *does that exact same job*.


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