[libre-riscv-dev] [Bug 298] consider using sum-addressed decoder in L1 cache (maybe also L1 I cache)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=298

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006196.html

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