[libre-riscv-dev] [Bug 267] The efficiency of adder/subtractor

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Thu Mar 26 23:10:07 GMT 2020


--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jock Tanner from comment #0)

> Actually I was thinking about what Harris&Harris suggested in their famous
> book. You just have to have an inverter on one operand input of an adder.
> The two's complement of that operand can be achieved via the carry input.

yes, interestingly, michael and i are reviewing in the simulator, various
implementations (microwatt, qemu, pear_pc), they all seem to do this

it looks like power was extremely well designed, and microwatt as well,
to basically "translate" opcodes into "everything is an ADD, but you
optionally do add1, add0, add-carry, occasionally invert op1,
oh and farm out carry to different places, or set carry to 0, or 1" etc. etc.

it's quite neat.

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