[libre-riscv-dev] Advanced Topics on RISCV

[Immanuel, Yehowshua U]

> given that AMOs are not very common, they basically get away with this
> approach.  however for massively-parallel SMP systems (64 cores or
> greater) this approach would begin to result in significant contention
> and slow-down of certain tasks.

So how would you get around this for >64 core RISCV CPU?

Yehowshua