[libre-riscv-dev] [Bug 264] ISA switch needs to be a privileged operation

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=264

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
so, um... it's just easier to use BE instruction format and "cheat" a little,
because the MSBs of the 32-bit instruction, containing the major opcode,
end up in the 1st byte:

byte 0:
31 30 29 28 27 26 25 24
| major opcode  | rest-of-32-bit-instruction...

byte 1:
23 22 21 20 19 18 17 16
more of 32-bit-instruction

see https://libre-riscv.org/openpower/:

if we take over 2 opcodes for each of C, SVP P48, SVP P64 and VBLOCK
then we have a workaround.  SVP P32 can potentially be "paged".

it's a bit of a pain that there's so few bits, due to the way that POWER
was never designed for this type of thing originally.

the way VLE works is, you actually have an entire new memory page which
is allocated a "format".  that means that mixing 16-bit VLE and 32-bit
VLE is basically impossible, and you have to jump between two completely
different memory pages repeatedly just to get access to regular
instructions which are not available in VLE 16-bit.

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