[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Thu Mar 19 00:24:42 GMT 2020
http://bugs.libre-riscv.org/show_bug.cgi?id=186
--- Comment #87 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #82)
> Oh I see. It's bit reversing the whole word
yes. that is what width-k-1 is for.
and then for the field which is local that needs to be reversed *back*.
this is what we are missing.
k is into the instruction (0..31)
t is into the FIELD and just to make life rreally interesting it can cover
MULTIPLE fields.
joy.
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the libre-riscv-dev
mailing list