[libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Wed Mar 18 06:57:42 GMT 2020
On Wednesday, March 18, 2020, <bugzilla-daemon at libre-riscv.org> wrote:
> --- Comment #1 from Jacob Lifshay <programmerjake at gmail.com> ---
> Just finished some refactoring in preparation for supporting Power's weird
> status flags.
the FP HDL needs a big update to bring out status bits. then another one
to add rounding modes, which is quite a bit of work.
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
More information about the libre-riscv-dev