[libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility

[Luke Kenneth Casson Leighton]

On Sun, Mar 15, 2020 at 7:20 PM Immanuel, Yehowshua U
<yimmanuel3 at gatech.edu> wrote:
>
> Or, is the internal format some sort of intermediate that both RISCV and POWER instructions map down to?

yeees.