[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Sun Mar 8 18:18:07 GMT 2020


--- Comment #71 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---

pulling it all together, some pieces still missing, needs a bit of rework:
classes that return "register num plus register valid" as an object, that
sort of thing, otherwise there's a lot of things to copy, laboriously.

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