[libre-riscv-dev] [Bug 206] Implement branch prediction

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Fri Mar 6 01:31:47 GMT 2020


--- Comment #19 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---

is this code (the block at line 101) *undoing* a miapredicted branch?

that means the SRAM has to be dual-ported, and if we do dual-issue it'll be
*quad* ported.


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