[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Thu Mar 5 18:03:43 GMT 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #63 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-riscv.org/openpower/isatables/fields/
(accessible as the straight .txt file from the git repo)

i literally cut/paste that from the pdf (xpdf) and tidied it up.
it would have been much better to have the source of the original
document, particularly if it was in .tex format, but oh well.

i've also added the "form" onto the end of the CSV files. some of
them are missing because i think they're from POWER 3.0 (whoops)

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