[libre-riscv-dev] daily kan-ban update 26jun2020

Luke Kenneth Casson Leighton lkcl at lkcl.net
Fri Jun 26 23:39:41 BST 2020

got it!

 class TestMemLoadStoreUnit(LoadStoreUnitInterface, Elaboratable):
-    def __init__(self, addr_wid=32, mask_wid=4, data_wid=32):
-        super().__init__()  <---- no arguments passed here

i wondered why the TestMemLoadStoreUnit instance had 32-bit addresses
when i set them to 64.

sorted.  thank you michael.  it's now possible (tomorrow) to try using
Pi2LSUI, and at that point we're almost connected to a wishbone bus
for data.


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