[libre-riscv-dev] [Libre-soc-bugs] [Bug 405] Write PowerPC64 backend for Cranelift

Jacob Lifshay programmerjake at gmail.com
Fri Jun 26 01:58:48 BST 2020


cc-ing to libre-riscv-dev to increase visibility

On Thu, Jun 25, 2020, 17:56 bugzilla-daemon--- via libre-soc-bugs <
libre-soc-bugs at lists.libre-riscv.org> wrote:

> https://bugs.libre-soc.org/show_bug.cgi?id=405
>
> Jacob Lifshay <programmerjake at gmail.com> changed:
>
>            What    |Removed                     |Added
>
> ----------------------------------------------------------------------------
>                  CC|                            |lkcl at lkcl.net
>
> --- Comment #2 from Jacob Lifshay <programmerjake at gmail.com> ---
> Luke (and others), what do you think of prioritizing using Cranelift as the
> shader compiler backend over LLVM?
>
> I'm planning on adding support for Cranelift even if we add LLVM support
> first,
> because of Cranelift's massive shader compile-time advantage.
>
> Cranelift is much more similar to the ACO backend for RADV in Mesa.
>
> Advantages:
> - simplicity
> - written in Rust
> - the shader compiler would run much more quickly -- important for graphics
> drivers
> - can architect the backend to work with our processor better since we'd be
> writing the code
> - works on embedded systems without a full Linux OS
> - can probably get additional funding from other interested parties since
> Cranelift having a PowerPC64 backend is quite useful beyond the bounds of
> our
> project
> - can easily use existing/add new C bindings for use from Mesa-based
> graphics
> driver
>
> Disadvantages:
> - need to write whole new backend since Cranelift currently doesn't support
> PowerISA -- can be done in a very incremental fashion.
> - we can't use LLVM's additional optimizations, though those are not that
> likely to be very useful anyway
>
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