[libre-riscv-dev] Scoreboard and LDST questions

Yehowshua yimmanuel3 at gatech.edu
Sun Jun 21 02:51:32 BST 2020

Hello Luke,
	Spent the past few hours pouring over the LDST architecture as well as the men-architecture.

Some comments/questions:
> The SR Latches create a forward-progressing Finite State Machine, with three possible paths:

From your description, only two of issue, go_rd, and go_wr can be active at any given time. That means that a maximum of 2 instructions can execute every 3 cycles?

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