[libre-riscv-dev] first version of test issuer is functional

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed Jun 17 17:49:49 BST 2020

On Wed, Jun 17, 2020 at 12:30 PM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:

> to be able to run programs in a loop (and have them verified) it is
> necessary to first to go back to the qemu-simulator comparator
> (test_sim.py), add the capability to the *Simulator* (ISACaller) to be
> able to read instructions from a memory area, and then finally come
> back to the hardware and do the same thing.

amazingly, the following loop test in the simulator actually worked:

(well done michael for making that possible!)

i'm just tidying up the simulator a bit, getting it to use an
instruction "memory".

then the next bit will be getting the hardware to "listen" to the PC,
executing that same loop unit test.


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