[libre-riscv-dev] Minerva L1 Cache
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Jun 15 05:32:52 BST 2020
On Monday, June 15, 2020, Yehowshua <yimmanuel3 at gatech.edu> wrote:
> > I’m currently working on writing a Minerva like nMigen
> > cache that supports as many sets as desired - hopefully
> > we can use that.
> I need a cache with arbitrary amount of sets for my thesis
ah ok now this makes sense.
> so - might be useful in a LibreSOC context too.
maybe. we will have to evaluate it. as i explained in the crossover
message there are other higher priority design requirements that are unique
and specially required for the design.
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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