[libre-riscv-dev] mortbopet/Ripes: A graphical processor simulator and assembly editor for the RISC-V ISA

[Cole Poirier]

Hi Libre-SOC developers,

I came across this graphical processor simulator for the RISC-V ISA:
https://github.com/mortbopet/Ripes. Is this possibly valuable to us?
Would it be possible for us to use this as a foundation or is it too
specific to RISC-V?

Cole