[libre-riscv-dev] Understanding the LibreSOC core

Michael Nolan mtnolan2640 at gmail.com
Mon Jun 8 22:19:29 BST 2020

On 6/8/20 4:38 PM, Luke Kenneth Casson Leighton wrote:
> there's a BIOS??  oink :)
> if there's a BIOS, it means that at least some instructions can be
> loaded (into something - probably an on-board SRAM) and executed, and
> that at least means we can test _something_ before getting to that
> stage.
> (meaning: the instructions to initialise DDR3 have to execute _from_
> somewhere, they can't be executed from thin air)
> btw we were planning to put in a "Board Support Package" NLNet Grant Request.
We were going to need to do something like this anyway though, the 
actual SOC will need some low level boot code in rom right? For initial 
testing the 45f has 216kiB of bram, which is plenty for running test 
code and whatnot (granted, we will need some of that ram for other 


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