[libre-riscv-dev] daily kan-ban update 08jun2020
colepoirier at gmail.com
Mon Jun 8 22:17:28 BST 2020
On Jun 8 2020, at 1:08 pm, Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:
> * worked with Cole on TRAP
> * fixed the Condition Register MFCR bug
> * started on XER testing
> * reviewed the IoT pitch
Thank you so much for this Luke, the discussion you had on-list with our
less frequently commenting members (because they have full time jobs),
who are incredibly technically capable was phenomenally helpful.
> * dealt with yet another massive headache.
> * fixed XER SO/OV/OV32 handling (simulator and test_core)
> going to take it easy for the rest of the day, return to LDST CompUnit
> testing tomorrow.
I'm very sorry to hear you're suffering from massive headaches, several
of my family members suffer from migraines, I know it's very unpleasant.
Today I think I need to focus exclusively on the pitch because the
deadline is so close and there is currently so much missing info.
I'm planning on taking the discussion on list, and the comments on the
pitch on the wiki and coming up with a new pitch specific to these
I'm going to spend the next two hours trying to take all of the
technical aspects of the pitch and put them into a coherent form with my
understanding of the technical aspects. Then I'll send this to the list
so that you and others can reply and correct inline.
I'll try to put just a few very specific questions (such as the
advantages/high level summary of Simple-V) for you and other technical
project members to answer. I would try answer this myself given your
present state, but unfortunately I don't think I can understand and
explain something like Simple-V on my own in a day.
Can I ask you to see if you're able to answer some of these questions
today, if your illness permits? I hate to ask you while you're sick, but
I think the pitch will really suffer without your technical input...
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