[libre-riscv-dev] [Bug 348] POWER9 SPR pipeline needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=348

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
TODO: MFSPR/MTSPR need fast-reg decoding in PowerDecoder2 DecodeA and DecodeOut

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