[libre-riscv-dev] [Bug 363] New: inconsistency between isel and mfcr unit test on bit-ordering of CR

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=363

            Bug ID: 363
           Summary: inconsistency between isel and mfcr unit test on
                    bit-ordering of CR
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Mac OS
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

very weird.

when storing the bits in the CR (full_cr vs individual CRs) the ordering
is wrong.

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