[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=336

--- Comment #48 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
hi cesar i added a hack-test for when wrmak is zero.  this basically says that
when the ALU says that is done, if there isno data to write then the MCU
write-request phase is also done.

the logic becomes pretty similar to what is in LDSTCompUnit, which for ST does
not write a reg, either.

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