[libre-riscv-dev] Some general instruction ideas

[Immanuel, Yehowshua U]

> We'll just have to avoid x86's mistake…

> Dedicated memcpy (actually memmove) and memset instructions can also
> increase speed by not needing to load the contents of totally-overwritten
> cache blocks from memory on a cache miss.

Are you for or against memcpy?

> We should support storing larger patterns (64-bits or larger) rather than
> being limited to setting all bytes the same.

Are you saying that we should have RISC store instructions that can support storing 1 - 4 bytes?

I’m personally a little skeptical of memcpy… Intuition tells me that to gain justifiable speedups - we’d need
to tightly integrate the instruction with hardware - and doing such might expose the attack surface for 
security exploits.

That said - what’s the RISC way of Memcopy?
probably:


loop: load from src reg to temp reg
store from temp reg to dest reg
increment src reg
increment dest reg
jmp loop

I’m thinking with at least a four stage pipeline with forwarding, at steady state - we’d be storing a byte every cycle?…

So memcpy - probably not well justified…

Any thoughts?