[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Sat Feb 29 21:56:43 GMT 2020


--- Comment #37 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
btw for RISCV we don't need to do one, as there is at least one migen RISCV
processor out there.

dang that took far too long to find!

entire search space "riscv nmigen" is polluted with irrelevant items.

anyway found it eventually.


question for you, illustrating why "import *" is problematic.

i have never seen the function "matcher" before.

can you tell me, immediately, without doing a google search, if it is a
standard python function, or if it is part of nmigen?

it's impossible to tell, isn't it?

even if it was a keyword, the very fact that there is even *one* import *
DESTROYS all confidence because nmigen *might* have an overriden function named


with some adaptation and checking the license file first, we should be able to
use that code.

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