[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #29 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #27)

> heck no, the whole point is to be able to do wget on the wiki version
> (rather than have two out-of-date copies)

ok bear in mind i just added the heading "comment" which was missing.
also added minor_19.

btw remember that in python int("0b100", 2) will convert to the value 4
so we can leave the values in minor_19 in binary, even detect the bit-length

all the minor_xx tables are exactly the same format as the major one.

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