[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=178

--- Comment #144 from Staf Verhaegen <staf at fibraservi.eu> ---
(In reply to Luke Kenneth Casson Leighton from comment #142)
> (In reply to Jean-Paul.Chaput from comment #141)
> >
> > By the way, it has been evoked somewhere the need for a PLL.
> > It happens that our lab have a strong experience about PLL,
> > one of our researcher is specialized in that topic.
> 
> ahh gooood.
> 
> we can if he wants to put in an application for NLNet funding.

I propose to move that discussion to separate bug thread. I am planning to have
a 0.35um tape-out in July. There should be room for adding PLL there.

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