[libre-riscv-dev] [Bug 186] Create decoder for SOC

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #21 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
ok the right-shift looks great, michael, i was pleasantly surprised that the
bit-
swap technique worked so well, particularly for the dynamic-partitioning.

can i make a suggestion, of adding tables of the ISA here:
https://libre-riscv.org/openpower/isatables/

i have found that it helps enormously.  basically, Appendix F from
Power Version 2.07B?

-- 
You are receiving this mail because:
You are on the CC list for the bug.