[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=178

--- Comment #103 from Jean-Paul.Chaput at lip6.fr ---
(In reply to Staf Verhaegen from comment #102)
> Alternatively I can also just provided the pin location of signel IO cell
> and the IO-ring can still be built by the Coriolis scripts.

Could you provide us with phantoms of the I/O pads?
Just boxes with terminals at the periphery (the soldering pad,
the I/O ring pad and the one to/from the core) compatible with
nsxlib ?

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