[libre-riscv-dev] [Bug 186] Create decoder for SOC
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Mon Feb 24 21:21:01 GMT 2020
http://bugs.libre-riscv.org/show_bug.cgi?id=186
--- Comment #17 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #14)
> // what I think SimpleV should be defined to do
(... it's not)
> void load1(int address_reg, int dest_reg, int N)
> {
> int address = regs[address_reg];
> for(int i = 0; i < N; i++)
> regs[dest_reg + i] = *(int *)(address + sizeof(int) * i);
> }
>
> // what SimpleV is currently defined to do
(... it's not)
> void load2(int address_reg, int dest_reg, int N)
> {
> for(int i = 0; i < N; i++)
> regs[dest_reg + i] = *(int *)(regs[address_reg] + sizeof(int) * i);
> }
it has support for both. the first is called 'indirect mode', the
second is 'stride mode'.
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