[libre-riscv-dev] [Bug 21] LPDDR3/LPDDR4 needed

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Mon Feb 24 14:44:11 GMT 2020


--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #7)
> (In reply to Michael Nolan from comment #6)
> > On a more constructive note, would it be feasible to do DDR1 or DDR2
> > ourselves?
> not in the timescales we have.

plus, it's essential that we keep everything that we're doing in the
digital domain.

any analog work - PLLs, resistors - we can't afford to take the risk
(and for the resultant analog design component to be a massively
critical dependency, without which success jeapordises 100% of the
entire design)

and we don't have an allocated budget - or the time - to put it in

october 2020.

that's 7 months in which to finish the core, and the instruction issue
engine, and the FPU, and the peripherals, and the pinmux, and the L1
cache, and, and, and and *then do the layout*.

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