[libre-riscv-dev] [Bug 21] LPDDR3/LPDDR4 needed

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=21

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #2)


> any source code links?

no.  it can be *made* libre on receipt of funds.

> If we do go with the proprietary DDR PHY, for the test chip it might be a
> good idea to include even a partial implementation of a libre PHY (maybe
> with a separate power domain if we're worried about shorts) 

all DDR PHYs use separate power domains,  the voltage levels are different from
core (and other IO).

> and include a
> pin-mux on the DDR pins, or just include both of them wired to separate
> pins, the extra pins shouldn't be too much of a concern for the test chip

it is far too much to do and far too costly (1000% more costly) to do a DDR PHY
for the 180nm test chip, and 180nm cannot cope with DDR3 anyway.

SDRAM (133mhz max) is the limit there and it is doable.

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