[libre-riscv-dev] next tasks

[Luke Kenneth Casson Leighton]

On Thu, Feb 20, 2020 at 8:30 AM Staf Verhaegen <staf at fibraservi.eu> wrote:

> Luke Kenneth Casson Leighton schreef op do 20-02-2020 om 03:10 [+0000]:
> > >
> > > If everything goes right I'll tape-out the Retro-uC in July on 0.35um with
> > > a M68K included.
> >
> >
> >
> > that is fantastic. is it libre licensed (and done in coriolis2) such that
> > it could be included?
>
> The code  is available on alliance-check-toolkit in benchs/ao68000 or
> from https://gitlab.com/Chips4Makers/ao68000/.

fantastic!

> In the latter I am working on nMigen intergration.

ok.  you saw yesterday i managed to get that running, with jean-paul's help:
https://git.libre-riscv.org/?p=soclayout.git;a=summary

and it looks like... just did a recent git pull, there's new rules
%.blif; %.il

those look great, it means i don't need a special version of
mk/synthesise-yosys.mk

> It's permissive licensed as I still want to be able to tape it out
> using proprietary standard cell and IO libraries.

understood.

l.