[libre-riscv-dev] next tasks

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed Feb 19 15:56:46 GMT 2020

On Wednesday, February 19, 2020, Michael Nolan <mtnolan2640 at gmail.com>

> Luke Kenneth Casson Leighton <lkcl at lkcl.net> writes:
> > michael would you like to have a go at writing a POWER ISA decoder?
> I can give it a go. Need to do some planning on the wiki though,

good idea

> but
> just as a rough idea is this going to be more like a modern OOO x86/arm
> "decoder" that converts instructions into 1 or more uOps,

kinda like that, yes.

basically we need to expand the incoming ops into "internal" (longer)
pseudo ops, with register nums fully expanded etc. etc.

"bit which says this routes to the FPU", and so on.

the 6600 instruction set was so elegantly designed that it was hard to
recognise where the routing actually was.

>  or more like
> the decoder on my custom cpu design which just pulls out the register
> fields and selects whether it's an ALU or memory etc. instruction?

kinda like that, too :)

bear in mind, the data (registers) get dropped into "Function Units".  have
a look at Mitch's book chapters.

they do NOT go "directly" into pipelines.

then take a look at the 6600 experiment code in the soc repo.

i have already started creating "internal" opcodes for ADD SUB MUL and so

> Since we're switching between POWER and RISCV at runtime and making an
> OOO processor, I'm suspecting it's going to be more like the former

bear in mind it is as if we have a 33 bit instruction.

the top bit simply selects as a mux the different ISAs.

microcoding we can do by setting "state bits" that ask partial results to
be fed BACK from the output of one pipeline UP to the Function Units again,
and feed it into a new pipeline.

so say we could have a signed/unsigned extender pipeline that receives
aaaallll partial data


there is no such actual opcode.

however in the "intermediary" expanded internal opcodes we have a bit set
which goes "if this is set then after result computation, shove me through
the signed pipeline and clear the bit saying i been there".

make any sense?


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