[libre-riscv-dev] [Bug 168] create naturally aligned partition points
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Thu Feb 13 17:32:33 GMT 2020
http://bugs.libre-riscv.org/show_bug.cgi?id=168
--- Comment #3 from Michael Nolan <mtnolan2640 at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #2)
> ok so the idea is, that the only options for partition sizes are:
>
> * 64
> * 32,32
> * 16,16,16,16
> * 8,8,8,8,8,8,8,8
>
> is that the idea?
Yes
>
> if so, this restricts us to not being able to run 32-bit arithmetic in one
> "lane" and 16-16 bit arithmetic in the other.
>
> this so that on vectorised instructions, if there are 32-bit instructions
> that happen to hit the 32-LO register port, the 32-*HI* port can be used
> for 32, 16-16, 8-8-8-8 *completely different* instructions that *HAPPEN*
> to occur (or are deliberately arranged to occur) on the exact same cycle
> and happen to be the exact same operation.
>
> now, whether these conditions turn out to be reasonable or not is another
> matter, hence why, yeah, it should be fine to consider this, and thus
> perhaps greatly simplify the partitioning.
>
> would we end up with a huge number of 32-bit-adds mixed in with 8-8-8-8
> adds? i don't honestly know.
This would make scheduling a bit more complicated, but it might be beneficial
to do this only for some modules. I don't think it'd make a huge difference for
the adder or comparator to use an aligned partition, but it might simplify the
shifter a good bit (because it eliminates a couple of the matrix entries).
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