[libre-riscv-dev] [Bug 172] partitioned signal add/sub/neg
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Wed Feb 12 15:06:26 GMT 2020
http://bugs.libre-riscv.org/show_bug.cgi?id=172
--- Comment #7 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
- carry-in : c c c c (4 bits)
- C = c & P: C C C c (4 bits)
- I = P=>c : I I I I (4 bits)
+ carry-in : c c c c c (5 bits)
+ C = c & P: C C C C c (5 bits)
+ I = P=>c : I I I I c (5 bits)
err... oh yes! of course, well spotted: the example i had done (or
maybe it was jacob), actually it is 5 partitions, but only 4 bits to
subdivide them, and i'd gotten confused when adding the number of
carry-in and carry-out bits.
good catch.
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