[libre-riscv-dev] Routing a first nmigen disign with Corilis

[Jean-Paul Chaput]

On Tue, 2020-02-11 at 18:37 +0000, Luke Kenneth Casson Leighton wrote:
> On Tue, Feb 11, 2020 at 5:32 PM Jean-Paul Chaput
> <Jean-Paul.Chaput at lip6.fr> wrote:
> > 
> > 
> > Depends on the zoom level and of the fact that you ask to see
> > the inside of the cells.
> > 
> > To actually see the transistors:
> >    Tools -> Controller -> Filter Tab -> check "Process Terminal Cells"
> 
> wooooow :)  i love it.
> 
> thank you.

  You can quicly hide/show the Controller with CTRL+I.

  You may also toy with Controller -> Look, try the other ones.
  If you want a new one, to mimic something you're better
  familiar with, it's in configurations files all written
  in Python so easy to do, if a little tedious.

> > You can also tweak the layer display:
> >    Tools -> Controller -> Layers & Go
> 
> i found that one, i was expecting it (from using PADS 9.6 and eagle etc.)
> 
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