[libre-riscv-dev] partitioned compare and mux

Michael Nolan mtnolan2640 at gmail.com
Fri Feb 7 15:47:42 GMT 2020

Luke Kenneth Casson Leighton <lkcl at lkcl.net> writes:

> *click* and because we now do *all* bits, that works..  ok we get away
> with that.


> previously, because only the LSB of each partition was set, inverting
> all bits of the result was't ok.
> ok so i think we're good there.  would you like to tackle __neg__,
> __sub__, and __invert__?  __invert__ is dead-easy, __neg__ and __sub__
> will need the PartitionedAdder except perhaps doing a "subtract" mode
> to it.  line 199:
> https://git.libre-riscv.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/part_mul_add/adder.py;h=0c28e6c4be4b6930c227b7614df025fa10399132;hb=HEAD#l199

Sure, I'll give it a go.
> do read up on how PartitionedAdder works, it saves a lot of
> computation in the simulation, and when running on FPGAs, plus it's
> really neat - any questions do ask, we need to document it on the
> wiki.

Sounds good.


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