[libre-riscv-dev] Cell libraries needed for coriolis

[Jean-Paul Chaput]

Hello Luke,

There is also the mandatory point of the target technology. I got the
impressions that you wanted to use a 180nm one (which is the limit for
which Coriolis can be made to work in a reasonable amount of time).
This should be discussed with Staf also. This is important because
we need that information to configure the symbolic layout for it
(typically, how many metal layers, are they all usable for routing
normal wires and so on). Then we can make place & route that are
sufficiently realistics.

And lastly, there is the tricky part of writing the translation rules
symbolic to real (that is GDSII). We have tried to automate that in
the past but never finished for various non-technical reasons...
This may be the occasion.

Best regards,

On Fri, 2020-02-07 at 15:16 +0000, Luke Kenneth Casson Leighton wrote:
> On Fri, Feb 7, 2020 at 2:51 PM Tobias Platen <tplaten at posteo.de> wrote:
> 
> > I found an example design included in coriolis-2.x. ALLIANCE is needed for the cell
> > libraries.
> > So my next documentation that I will write is how to install ALLIANCE and route the
> > example design that comes with coriolis-2.x.
> 
> fantastic.  this will all be paid-for btw, and we want to use both me
> and cole to test it actually being "working".
> 
> then, the next task is: create a (new) repo, select some random module
> somewhere, and do a "small chip" (route it).  this will give us a
> clear idea of what the hell we're doing and also give some idea of the
> amount of time it takes.
> 
> *then* we can finish the MoU for coriolis2.
> 
> good stuff, tobias.
> 
> l.
> 
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