[libre-riscv-dev] [Bug 165] New: Formally verify the FPCMP (FEQ, FLE, FLT) module

Michael Nolan mtnolan2640 at gmail.com
Mon Feb 3 16:01:29 GMT 2020

Luke Kenneth Casson Leighton <lkcl at lkcl.net> writes:

I don't have anything for gt/lt yet, but would something like this be
better for eq? (I think I could modify it for gt/lt as well)


The muxes are two input, and would copy the inputs straight through when
sel is 0, and swap them when sel is 1.


(also, is imgur an acceptable site for sharing images or should I put
them somewhere else?)

More information about the libre-riscv-dev mailing list