[libre-riscv-dev] submitted bugreport to upstream nmigen

[Immanuel, Yehowshua U]

> fantastic to hear that. must contact her and offer some € for nmigen
> work.  in particular we need simulation of SR NAND latch and support
> for it to output into yosys.


 Yes. Whitequark is great. I had contacted ‘quark some time ago about supporting her work directly.
It would be nice if we could support her work on YosysCXX too.

Yehowshua