[libre-riscv-dev] [isa-dev] 3D Matrix-style operations / primitives

[lkcl]

On Wednesday, September 18, 2019 at 8:00:56 AM UTC+1, lkcl wrote:
 

> No I don't think it does.  The assumption is that the element indices are 
> always XLEN wide and it is the data to which elwidth applies in the src.
>
> Have to fix that by adding a fmt field to MV.X let me just update the page]
>

 The idea here is to allow 8-bit indices to be stored inside XLEN-sized
registers, such that rather than doing this:

.. parsed-literal::
    ldimm x8, 1
    ldimm x9, 3
    ldimm x10, 2
    ldimm x11, 0
    {SVP.VL=4} MV.X x3, x8, elwidth=default

The alternative is this:
    
.. parsed-literal::
    ldimm x8, 0x00020301
    {SVP.VL=4} MV.X x3, x8, elwidth=8

Thus compacting four indices into the one register. x3 and x8's element
width are *independent* of the MV.X elwidth, thus allowing both source
and element element widths of the *elements* to be moved to be over-ridden,
whilst *at the same time* allowing the *indices* to be compacted, as well.


what do you think?

l.