[libre-riscv-dev] whole stack of vulkan llvm spirv stuff
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu Sep 12 02:45:12 BST 2019
On Thu, Sep 12, 2019 at 2:41 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
> > > we would still need the scalar to vector conversion code, which is almost
> > > all of the spir-v to llvm converter I'm writing as part of Kazan
> > > (converting scalar spir-v to scalar llvm is trivial by comparison).
> >
> > okaay, got it. which, hm, makes me curious as to how the heck AMD did it.
>
>
> they do it in their AMDGPU backend for LLVM, which works because AMDGPU is
> a GPU-only ISA.
okaay, so everything remains scalar, right up until the actual opcodes
- in the AMDGPU ISA - hit the machine.
i think... i think this probably ties in with that conversation we had
with one of the AMDGPU developers last year, where they wanted that
"dynamic typecasting" ability on register files.
l.
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