[libre-riscv-dev] [isa-dev] Re: FP transcendentals (trigonometry, root/exp/log) proposal

[Mitchalsup]

I can perform FP64 argument reduction for SIN/COS in 4 cycles and the prerounded result has at least 58-bits ofproper prerounded result. I do in HW what it takes hundreds of cycles to do in a Payne and Hanek SW routine. Itcovers all the silly argument cases in equal time.
I am willing to show anyone who is willing to sign an NDA exactly how it all works.
SIN( 10^22 )                                    = -0.8522008497671888017727COS( 6381956970095103×2^797) = -4.68716592425462761112×10^-19

Mitch AlsupMitchAlsup at aol.com

-----Original Message-----
From: Allen Baum <allen.baum at esperantotech.com>
To: Jacob Lifshay <programmerjake at gmail.com>
Cc: Luke Kenneth Casson Leighton <luke.leighton at gmail.com>; RISC-V ISA Dev <isa-dev at groups.riscv.org>; Libre-RISCV General Development <libre-riscv-dev at lists.libre-riscv.org>
Sent: Wed, Sep 11, 2019 2:42 pm
Subject: Re: [isa-dev] Re: FP transcendentals (trigonometry, root/exp/log) proposal

Argument reduction is a huge pain; maybe even slower than the evaluation once it's finished?HP calculators guaranteed  accuracy to 1 LSdigit in the *input* argument (which is much, much larger than 2pi), not in the output
On Wed, Sep 11, 2019 at 12:23 PM Jacob Lifshay <programmerjake at gmail.com> wrote:

On Wed, Sep 11, 2019, 04:43 lkcl <luke.leighton at gmail.com> wrote:

https://gpuopen.com/wp-content/uploads/2019/08/RDNA_Shader_ISA_5August2019.pdf




someone kindly (privately) pointed out the above - table 22, p44 - and apart from updating to include F16 and in some cases F64, the opcodes provided *have not changed* in 11 years since the R500.

looking through it again, the sin/cos instructions for Radeon are actually sin(x * 2 * pi) and cos(x * 2 * pi), reinforcing my idea to just implement sinpi/cospi for GPU applications, though there is a V_TRIG_PREOP_F64 instruction to accelerate argument reduction for f64 sin/cos.
Jacob-- 
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