[libre-riscv-dev] power pc

[Luke Kenneth Casson Leighton]

On Wednesday, October 30, 2019, Jacob Lifshay <programmerjake at gmail.com>
wrote:

>
> > The only problem is the intransigence of the RISCV Foundation, the
> > ISAMUX/NS switch is needed to get into PowerISA mode.
> >
>
> my idea is that the supervisor would be in Power mode and the user would be
> in rv64gc mode (or Power or other isa), switching between them just uses
> the standard risc-v system call instructions. the isamux would only need to
> be in the Power side for the MVP.


Darn it's been several months. I can't recall immediately the notes.


>
> this is similar to how a x86_64 kernel can run ia32 programs.
>
> this isn't intended to allow intra-program RISC-V/Power interoperability as
> much as to allow running RISC-V programs without a software emulator.


Ok yes I get it.

Ok that would work well.  RV would not even know.

The only thing that would be odd is kernel syscalls. Those would be
PowerISA yet userspace would be RV.

yes I see what you're getting at. unfortunately the linux kernel team
pulled the plug on x32 last year (appx).

It may be better to have hypervisor support from Power, then create a
dedicated project (with NLNet funding) to support a crossover (a la x32)

?

L.



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